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‎src/i2s/i2s_slave_duplex.pio‎

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;
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; RP2040 / RP2035 PIO program for the duplex I2S transfer in slave mode.
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;
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;
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; The I2S signal wave form is depicted below :
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;
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; ┐　┌─┐　┌─┐　┌─┐　┌─┐　
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; BCLK └─┘　└─┘　└─┘　└─┘　└─
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; ┐
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; WS └─────────────────
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;
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; BIT SLOT │　００│　３１│　３０　│　２９│　
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;
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; The rising edge of the BCLK is the sampling edge of the I2S.
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; So we can call the period from a falling edge to the next falling
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; edge as a "BIT SLOT".
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;
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; Per definition of I2S standard, the first bit slot after the
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; falling edge of the WS is the last bit slot (00) of the previous
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; right channel.
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;
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; In the program below, we have 3 sync loop before the actual data
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; transfer. These sync loops guarantees the data integrity for
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; any timing of the program start.
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;
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; Pin mappings :
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; - Out pin 0 : Signal Data out.
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; - In pin 0 : Signal Data in.
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; - In pin 1 : BCLK in.
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; - In pin 2 : WS. Configured as JMP pin.
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.pio_version 0 ; only requires PIO version 0
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.program i2s_slave_duplex ; Program entry point.
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; The following 3 loops avoid the trouble from the timing problem.
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; The beginning of the PIO state machine program is not synchronized
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; with the running I2S master signal.
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; As a result, the PIO program may start :
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; - At the middle of Left ch.
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; - At the right ch.
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; - At the boundary of left and right ch.
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; These timing may cause the LR swap or noise issue. Also other
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; unknown issue may cause.
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; To avoid this trouble, the following 3 loops guarantee the
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; data transfer start from the precisely beginning of left ch.
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sync2_loop: ; Loop to wait for left ch
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wait 0 pin 1 ; Capture falling edge of BCLK(Sync to the driving edge of BCLK).
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wait 1 pin 1 ; Capture rising edge of BCLK(Sync to the Sampling edge of BCLK).
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jmp pin sync2_loop ; repeat while WS == 1.
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sync1_loop: ; Loop to wait for right ch.
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wait 0 pin 1 ; Capture falling edge of BCLK(Sync to the driving edge of BCLK).
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wait 1 pin 1 ; Capture rising edge of BCLK(Sync to the Sampling edge of BCLK).
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jmp pin sync0_loop ; Exit loop if WS == 1
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jmp sync1_loop ; repeat while WS == 0.
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sync0_loop: ; We are fully sync with Right channel here.
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wait 0 pin 1 ; Capture falling edge of BCLK(Sync to the driving edge of BCLK).
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wait 1 pin 1 ; Capture rising edge of BCLK(Sync to the Sampling edge of BCLK).
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jmp pin sync0_loop ; repeat while WS == 1.
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; In the following transfer loop, the pull instructions are
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; blocking operation. This allows small under under flow from the
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; main program. n the other words, delay of the TX data is
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; allowed ( alternatively, we may have some noise) and transfer
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; process recovers in next cycle.
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; The push instructions are not blocking because the
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; timing of these instruction is critical and non-recoverable.
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.wrap_target ; Beginning of stereo data transfer. WS is 0 at here.
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; Transfer Left ch
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pull block ; We have empty OSR. Load left ch data.
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left_loop: ; Loop to transfer left ch.
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wait 0 pin 1 ; Capture falling edge of BCLK(Sync to the driving edge of BCLK).
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out pins, 1 ; Output 1 bit to DAC.
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wait 1 pin 1 ; Capture rising edge of BCLK(Sync to the Sampling edge of BCLK).
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in pins, 1 ; Input 1 bit from ADC.
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jmp pin left_exit ; Exit loop if WS == 1
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jmp left_loop ; repeat while WS == 0.
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left_exit: ; Tearing off the shift registers. WS is 1 at here.
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push noblock ; We have filled ISR. Push ISR to store right data.
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; Transfer right ch
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pull block ; We have empty OSR. Load right ch data.
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right_loop: ; Loop to transfer right ch
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wait 0 pin 1 ; Capture falling edge of BCLK(Sync to the driving edge of BCLK).
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out pins, 1 ; Output 1 bit to DAC.
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wait 1 pin 1 ; Capture rising edge of BCLK(Sync to the Sampling edge of BCLK).
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in pins, 1 ; Input 1 bit from ADC.
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jmp pin right_loop ; repeat while WS == 1.
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; Tearing off the shift register.
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push noblock ; We have filled ISR. Push ISR to store left data.
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.wrap
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; This program takes 5 cycles for the second half of a bit slot.
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; This happens when program wraps. So, for the entire clock cycle,
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; we need 10 cycle.
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;
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; For the 96kHz I2S stereo ( 32bit word), the BCLK is 6MHz. As a result,
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; we need abut 60MHz (96kHz * 2 * 32 *10) for PIO clock.

‎src/i2s/i2sslaveduplex.cpp‎

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#include "i2sslaveduplex.hpp"
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#include "sdkwrapper.hpp"
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#if __has_include(<hardware/pio.h>) // Is build in Pico Environment?
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extern "C" {
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#include "i2s_slave_duplex.pio.h" // Generated by PIO compiler.
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}
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#else
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static pio_program_t i2s_slave_duplex_program;
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#endif // __has_include(<hardware/pio.h>)
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rpp_driver::I2sSlaveDuplex::I2sSlaveDuplex(::rpp_driver::SdkWrapper &sdk,
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PIO pio, uint pin_base)
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: sdk_(sdk),
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pio_(pio),
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sm_(sdk_.pio_claim_unused_sm(
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pio_, true)), // true mean required. assert if no room.
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pin_base_(pin_base) {}
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rpp_driver::I2sSlaveDuplex::I2sSlaveDuplex(::rpp_driver::SdkWrapper &sdk,
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PIO pio, uint32_t sm, uint pin_base)
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: sdk_(sdk), pio_(pio), sm_(sm), pin_base_(pin_base) {
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sdk_.pio_sm_claim(pio_, sm_);
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}
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rpp_driver::I2sSlaveDuplex::~I2sSlaveDuplex() {
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sdk_.pio_sm_unclaim(pio_, sm_);
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}
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uint32_t rpp_driver::I2sSlaveDuplex::GetStateMachine() { return sm_; }
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int32_t rpp_driver::I2sSlaveDuplex::GetFifoBlocking() {
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return sdk_.pio_sm_get_blocking(pio_, sm_);
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}
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void rpp_driver::I2sSlaveDuplex::PutFifoBlocking(int32_t value) {
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sdk_.pio_sm_put_blocking(pio_, sm_, value);
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}
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void rpp_driver::I2sSlaveDuplex::Start() {
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// Assign these pins for PIO by GPIO mux.
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sdk_.pio_gpio_init(pio_, pin_base_);
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sdk_.pio_gpio_init(pio_, pin_base_ + 1);
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sdk_.pio_gpio_init(pio_, pin_base_ + 2);
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sdk_.pio_gpio_init(pio_, pin_base_ + 3);
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// Configure the physical direction of these pins inside PIO module.
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sdk_.pio_sm_set_consecutive_pindirs(pio_, sm_,
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pin_base_, // BASE GPIO pin number.
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1, // 1 pin for output.
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true); // true for output.
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sdk_.pio_sm_set_consecutive_pindirs(pio_, sm_,
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pin_base_ + 1, // BASE GPIO pin number.
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3, // 3 pins for input.
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false); // false for input.
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// Load the PIO program to the memory.
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uint instruction_offset =
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sdk_.pio_add_program(pio_, &i2s_slave_duplex_program);
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// Create a state machine configuration structure.
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// The duplex_i2s_program_get_default_config() is generated by the
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// PIO compiler. So, there is no wrapper.
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pio_sm_config config =
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i2s_slave_duplex_program_get_default_config(instruction_offset);
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// Assign GPIO pins to IN/OUT/JMP instructions inside SM.
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sdk_.sm_config_set_out_pins(&config,
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pin_base_, // PIN_SDOUT
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1); // 1 pin for output.
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sdk_.sm_config_set_in_pin_base(&config,
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pin_base_ + 1); // PIN_SDIN.
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#if 0
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// sm_config_set_in_pin_count is buggy in pico sdk v2.0.0
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// See https://github.com/raspberrypi/pico-sdk/issues/1878 for details.
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sdk_.sm_config_set_in_pin_count(&config,
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2); // 2 pins for input.
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#endif
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sdk_.sm_config_set_jmp_pin(&config, pin_base_ + 3); // WS
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// Set the PIO clock divider.
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// We need 96kHz stereo 32bit transfer. So the BCLCK is 96'000*2*32Hz.
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// The clock for the duplex I2S PIO program must be 10 times or grather
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// ( See the comment in the duplex_i2s.pio_ ).
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// To avoid the jitter, we calculate the division factor in
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// integer.
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float div = (sdk_.clock_get_hz(clk_sys) / (96'000 * 2 * 32 * 10));
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sdk_.sm_config_set_clkdiv(&config, div);
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// Input shift register configuration.
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sdk_.sm_config_set_in_shift(&config,
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false, // false to left shift.
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false, // false to no auto push.
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32); // 32bit word.
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// Output shift register confiuration.
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sdk_.sm_config_set_out_shift(&config,
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false, // false to left shift.
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false, // false to no auto pull.
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32); // 32bit word.
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// Configure SM. Flush FIFO, and ready to run the program.
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sdk_.pio_sm_init(pio_, sm_, instruction_offset, &config);
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// Placing dummy data in FIFO to avoid the underflow at first TX.
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// This must be done after calling pio_sm_init() because that routine
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// flushes the FIFO.
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// We need 2 stereo samples.
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// The first stereo sample is for the initial transfer. At this transfer,
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// CPU program is waiting the received signal without the transmit data.
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// So, we need to fill dummy TX sample.
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// After the first data transfer, the main routine starts to process data.
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// And to get the transmit data ( as proessed data ), we need time which is
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// max 1 sample. Then, we need to fill another dummy.
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// That is why we need two stereo sample here inside TX FIFO.
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sdk_.pio_sm_put(pio_, sm_, 0); // Put left word for the first TX.
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sdk_.pio_sm_put(pio_, sm_, 0); // Put right word for the first TX.
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sdk_.pio_sm_put(pio_, sm_, 0); // Put left word for the second TX.
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sdk_.pio_sm_put(pio_, sm_, 0); // Put right word for the second TX.
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// Start the state machine.
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sdk_.pio_sm_set_enabled(pio_, sm_, true);
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}
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void rpp_driver::I2sSlaveDuplex::Stop() {
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// Stop state machine.
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sdk_.pio_sm_set_enabled(pio_, sm_, false);
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// Clean up FIFO for the next processing.
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sdk_.pio_sm_clear_fifos(pio_, sm_);
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// We don't unclaim the state machine.
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// The SM will be unclaimed by destructor.
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}

‎src/i2s/i2sslaveduplex.hpp‎

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#ifndef PICO_DRIVER_SRC_I2S_DUPLEXSLAVEI2S_HPP_
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#define PICO_DRIVER_SRC_I2S_DUPLEXSLAVEI2S_HPP_
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#if __has_include(<hardware/pio.h>)
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#include "hardware/pio.h"
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#else
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// Alternate definition for unit test.
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#define i2s_slave_duplex_program_get_default_config(config) 1
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#define clk_sys 51
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#endif //__has_include(<hardware/i2c.h>)
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#if __has_include(<gmock/gmock.h>)
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#include <gmock/gmock.h>
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#endif
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#include "sdkwrapper.hpp"
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namespace rpp_driver {
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/**
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* @brief Duplex Slave I2S controller class.
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* @details
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* This class support the duplex communication of the I2S on the PIO port of the
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* RP2040/2350 SoC MCU.
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*
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* The timing signal (BCLK and WS) of the I2S must be provided from the external
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* device. This class support up to 192kHz Fs if the MCU system clock is higher
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* than 120MHz.
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*
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* The I2S pins can be mapped on the GPIO. This mapping is based on the
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* pin_base parameter of the constructors.
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*
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* The pin_base parameter of the constructors is the first pin of 4 I2S signals.
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* The signals must be consecutive on the GPIO pins as like :
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* -# SDOUT
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* -# SDIN
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* -# BCLK
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* -# WS
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*
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* To start and stop the I2S transfer, call the Start() and the Stop() member
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* functions respectively.
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*
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* The audio sample in and out are through the GetFifoBlocking() and the
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* PutFifoBlocking() member function, respectively. These are blocking function.
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* That mean, program will wait until the data is ready, or FIFO has room for
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* data.
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*
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* This class assumes polling based data transfer instead of interrupt / DMA
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* based data transfer.
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*/
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class I2sSlaveDuplex {
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private:
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::rpp_driver::SdkWrapper &sdk_;
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PIO pio_;
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const uint32_t sm_; // State machine ( 0..3 )
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const uint pin_base_; // first GPIO pin number of the I2S signal.
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public:
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I2sSlaveDuplex(/* args */) = delete;
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/**
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* @brief Construct a new Duplex Slave I 2 S object
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*
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* @param sdk SDK wrapper class injection.
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* @param pio PIO to use.
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* @param pin_base The GPIO pin number of SDOUT signal.
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* @details
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* The state machine number is not specified in this constructor.
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* Internally, the state machine will be allocate from the unused one.
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*
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*/
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I2sSlaveDuplex(::rpp_driver::SdkWrapper &sdk, PIO pio, uint pin_base);
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/**
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* @brief Construct a new Duplex Slave I 2 S object
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*
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* @param sdk SDK wrapper class injection.
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* @param pio PIO to use.
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* @param sm State machine to use.
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* @param pin_base The GPIO pin number of SDOUT signal.
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* @details
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*/
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I2sSlaveDuplex(::rpp_driver::SdkWrapper &sdk, PIO pio, uint32_t sm,
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uint pin_base);
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/**
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* @brief Stop the state machine and make FIFO empty.
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*/
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~I2sSlaveDuplex();
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/**
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* @brief Initialize the I2S port, and run.
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* @details
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* Assign the GPIO, configure them, load the PIO program, configure the state
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* machine and run.
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*/
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virtual void Start();
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/**
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* @brief Stop the I2S port and disable the PIO state machine in use.
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* @details
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* Make FIFOs empty.
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*
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*/
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virtual void Stop();
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/**
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* @brief Get the State Machine object
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*
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* @return uint32_t The number of the state machine which is claimed.
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* @details
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* This is convenient if the state machine is assigned internally.
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*/
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virtual uint32_t GetStateMachine();
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/**
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* @brief Get one audio data from RX FIFO.
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*
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* @return int32_t An audio data.
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* @details
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* To get one stere sample, call this member function twice. The left data
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* will be given and then, right data.
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*
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* This function is blocking. That mean, program will wait until the data has
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* been received.
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*/
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virtual int32_t GetFifoBlocking();
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/**
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* @brief Put one audio data to TX FIFO.
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*
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* @param value An audio data to send.
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* To put one stere sample, call this member function twice. The left data
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* must be put and then, right data.
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*
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*/
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virtual void PutFifoBlocking(int32_t value);
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};
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#if __has_include(<gmock/gmock.h>)
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class MockI2sSlaveDuplex : public I2sSlaveDuplex {
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public:
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MOCK_METHOD0(GetStateMachine, uint32_t(void));
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MOCK_METHOD0(Start, void(void));
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MOCK_METHOD0(Stop, void(void));
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MOCK_METHOD1(PutFifoBlocking, void(int32_t value));
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MOCK_METHOD0(GetFifoBlocking, int32_t());
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};
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#endif // __has_include(<gmock/gmock.h>)
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} // namespace rpp_driver
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#endif // PICO_DRIVER_SRC_I2S_DUPLEXSLAVEI2S_HPP_

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